The present disclosure herein relates to semiconductor memory devices, and more particularly, to a nonvolatile memory device capable of reducing the noise of a common source line, and a method of programming such a device.
In general, semiconductor memory devices may be classified into volatile memory devices and nonvolatile memory devices. The volatile memory devices lose data stored therein when power supply thereto is interrupted, whereas the nonvolatile memory devices retain data stored therein even when power supply thereto is interrupted. Examples of nonvolatile memory devices include flash memory devices, ferroelectric random-access memory (FRAM) devices, magnetic random-access memory (MRAM) devices, and phase-change random-access memory (PRAM) devices.
Flash memory devices are classified into NOR flash memory devices and NAND flash memory devices according to the types of cell array structure employed. A NOR flash memory device has a plurality of memory cell transistors connected respectively to bit lines and word lines. Thus, the NOR flash memory has good random-access time characteristics. On the other hand, a NAND flash memory device has a plurality of memory cell transistors connected in series with each other. This structure is called a cell string, and each cell string needs only one bit line contact. Thus, the NAND flash memory device has good characteristics in terms of the integration density.
A flash memory device includes a memory cell array that stores data. The memory cell array includes a plurality of memory blocks. Each of the memory blocks includes a plurality of pages. Each of the pages includes a plurality of memory cells. The memory cells are divided into ON cells and OFF cells according to the distribution of a threshold voltage for the cells. The ON cell is an erased cell and the OFF cell is a programmed cell. Due to its structural characteristics, the flash memory device performs an erase operation on a memory block basis and performs a read/write operation on a page basis.
The flash memory device has a cell string structure. The cell string includes a string select transistor (SST) connected to a string select line (SSL), memory cells connected to word lines (WLs), and a ground select transistor (GST) connected to a ground select line (GSL). The SST is connected to a bit line (BL), and the GST is connected to a common source line (CSL).
Meanwhile, if a noise voltage is generated on the CSL, the noise voltage of the CSL may cause a malfunction of the flash memory device. For example, although a memory cell that is intended to be programmed is not completely programmed (or written) yet during a programming operation, it may be incorrectly verified during a programming operation as having been programmed. In that case, if the memory cell is read after completion of the programming operation, such a malfunction may cause the memory cell that was intended to be programmed to be read as a non-programmed memory cell.